source:Industry News release time:2022-05-18 Article author:yu Popular:pcb
Following good guidelines for Gigabit Ethernet PCB layout listed below can successfully resolve the above issues.
If possible, isolate the PHY from the magnetics - at least 25 mm.
Make sure that the differential pairs between the PHY and the magnetics are routed in parallel as precisely as possible.
Place the pull-up resistors on the PHY differential pair within 10 mm of the associated traces.
Do not route PHY differential pairs near the edge of the board.
The link routing between PHY and MAC should have the same signal strength and be parallel.
Make sure there is a solid ground plane under the differential signal in the return path.
Do not use separate ground planes or vias for differential pairs.
Decoupling capacitors should be placed as close as possible to the supply pins.
By following the PCB layout guidelines above, you should be able to avoid challenges that could threaten the operation of a Gigabit Ethernet communication board.
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